Design Verification Engineer

Capgemini - Europe, 🇬🇷 Greece, Thessaloniki/Steliou Kazantzidi, Ampelokipoi, Athens

We are looking for a highly skilled Design Verification Engineer with strong expertise in System Verilog, UVM methodology, and hands-on experience with DDR protocols. In this role, you will be a key contributor to verifying complex, high-performance digital IP and SoC designs used in next-generation semiconductor products. You'll collaborate closely with architects, designers, and fellow verification engineers to ensure robust, high-quality designs that meet stringent performance and reliability requirements.