Middle Rtl Engineer (ukraine)

Capgemini - Europa, 🇺🇦 Ukraine, Kyiv

Implement Design Microarchitecture at RTL level for high-performance blocks based on Functional Specification from Senior Engineers and Architects. Perform RTL Debugging, ensuring design correctness and efficiency. Run and analyze Lint Checks and CDC (Clock Domain Crossing) Checks. Collaborate with verification, physical design, and architecture teams. Apply Power Optimization Techniques for energy-efficient designs.